1. Field of the Invention
The present invention relates to the field of non-volatile memory devices. Specifically, the present invention is a method and apparatus for providing external boot block protection to a non-volatile memory device without an internal boot block protection and providing support for non-volatile memory devices that are currently not supported by hardware in the computer system.
2. Description of the Related Art
Typically, in a computer system, a read only memory (ROM) is employed to store non-volatile code that is used to initialize the computer system upon startup and to perform other housekeeping tasks for the computer system. For example, in a PC (personal computer) architecture, an AT motherboard is typically equipped with a non-volatile memory device (e.g., an electronically programmable Read Only Memory (EPROM)) that stores Basic Input/Output System (BIOS) code. BIOS code includes software routines that provide a low-level interface to devices in the computer system.
Advances in the non-volatile memory device arena have led to a ROM that is programmable in-circuit. For example, the electronically programmable read only memory (EPROM) is a non-volatile memory that is adapted to be programmed while connected to the motherboard.
The assignee of the present patent application has developed FLASH.TM..sup.1 technology that provides a non-volatile memory that is adapted to be both erasable and programmable while in-circuit. FLASH.TM. technology provides the additional advantage of being able to erase blocks of the non-volatile memory, as well as being able to write to the non-volatile memory without having to remove the FLASH.TM. memory device from the motherboard. However, with the ability to erase portions of the non-volatile memory, the loss of important code becomes an important consideration. For example, if one were to accidentally erase the boot code stored in the non-volatile memory, the computer system then would not start up upon system startup. FNT .sup.1 FLASH is a registered trademark of Intel Corporation.
In order to prevent the loss of important boot code, certain FLASH devices incorporate a boot block feature. In these memories, internal circuits ensure that all blocks except the boot block are erasable. The controller for these devices typically also have two modes of operation (i.e., a normal mode and a recovery mode). In the normal mode, BIOS code contained in the memory (e.g., ROM) is executed. In the recovery mode, after an error is detected in the BIOS code, the computer system can utilize the code in the boot block section of the ROM to boot a diskette and rebuild the BIOS code.
This prior art system has two notable shortcomings. First, a shortage in the market of FLASH devices that include this boot block feature would force motherboard manufacturers to exclude this boot block feature in the nonvolatile memory devices. In other words, the manufacturers would have to settle for a non-boot block non-volatile memory that provided no internal protection for important boot code. Second, as new features and associated code to support these new features are implemented in the non-volatile memory, the present system bus controller (also known as a bridge) may not be capable of accessing the entire memory area. Moreover, the devices having a boot block feature are typically more expensive. Furthermore, devices having the boot block feature are hardwired and not flexible for adapting to memories having different sizes. For example, bridge controllers decode a limited predetermined memory area (i.e., a memory having a fixed size). One solution to accommodate larger non-volatile memory devices is to redesign the system bridge. However, this option is costly and presents software and hardware compatibility problems.
Accordingly, a method and apparatus for providing external boot block protection to non-volatile memory devices without an internal boot block feature and for providing support for non-volatile devices having sizes that are not currently supported by the system bridge is desired.